Re: Adjust CP4 Clock Frequency

Craig Young

I am not absolutely certain the RA drift is due to an offset in the clock frequency, it is only a possibility among others.  But I do like the idea of measuring the clock using the method you described.  I have a couple of questions though,

a) does the clock share the same oscillator as used by the electronics responsible for sidereal rate?
b) is the clock on the CP4 updated from APCC and if so how do I disable that, and how frequent or when does APCC update the CP4 time?
c) I assume the clock time is maintained after I power down the mount.  Do I need to keep the mount powered on for the test?

I can then use SL# to record the time and then 24 hours later do the same thing.

One thing I noticed a couple of years ago is when I powered up the mount and slewed to a set DEC,HA did a plate solve that each subsequent trial (park, power off, power on, slew) resulted in an increasing error in the position.  It was as if the time base was drifting.  I have not tried this in a while so may schedule that for the next clear night.  But it may be that Ray fixed this in one of the APCC/firmware updates since then.

If the clock does indeed share the same oscillator as the sidereal electronics then this will tell us if the clock frequency is off a bit.


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